Evaluation Board with ZSP 403LP

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Brochure: dt403lp_br.pdf (348 KB)
Users Guide:dt403lp_ug.pdf (1,096 KB)

Additional Documentation



Improve the efficiency of your embedded software development for the ZSP400 core with the DT403LP.  Evaluate the ZSP 403LP chip and use the provided software application to manipulate the on board audio codec.   The board features an on board audio codec, integrated JTAG emulator, 128K words of SRAM, and an interface to the HPI-USB or host processor mother board.






  • ZSP 403LP Chip
  • 128K Words External SRAM
  • 15.104 MHz Clock Oscillator
  • 32-pin Host Port Connector
  • 34-pin Host Port Connector
  • 2 20-pin serial ports with SPORT pinout
  • 4 LED outputs controlled via PIO
  • 4 LED outputs controlled via EMI and PLD
  • Integrated USB Controller with JTAG, 8-bit HPI
  • Status LEDs for USB Controller
  • Audio Codec with Stereo In/Out and 2 Mic Inputs
  • Integrated Speaker
  • JTAG Header for External Emulator

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Package Contents:

  • Evaluation Board
  • USB cable
  • User's Guide with Application Notes


The DT403LP board is 6.4 inches by 4 inches in size and designed around the ZSP 403LP chip (208-pin PQFP).  It has an integrated JTAG emulator, but can be used with an external JTAG emulator.  The evaluation board has 8 individual LEDs which can be used for status information or debugging; 4 are controlled via PIO and 4 controlled via EMI and PLD.   An integrated USB controller with 8-bit HPI interface is on board, making it possible to load programs and start/stop the ZSP 403LP by simply plugging a USB cable into the board.  The board has an integrated 16-bit stereo codec which is disabled when any adapter board is plugged into SPORT0.  It features both a 32-pin Host Port Interface as well as a 34-pin Host Port Interface; only one interface can be active at a time.

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The ZSP 403LP initialization is possible only through the HPI port.  After power on reset, the on board micro-controller bootstraps the ZSP 403LP through the host port with the Software Monitor code allowing the JTAG emulator to control the ZSP.  The board may be powered via the USB port if the power draw is less than 300mA.  

This versatile evaluation board can be integrated with additional hardware from Domain to support telephony testing. Create a 2 or 4 line VOIP demo system by adding one or more DTSLIC2L telephony daughter boards. 

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